28 search results - page 2 / 6 » The Multicluster Architecture: Reducing Cycle Time Through P... |
IEEEPACT
2005
IEEE
13 years 10 months ago
2005
IEEE
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
IASTEDSEA
2004
13 years 6 months ago
2004
Time pressure and quality issues bring new challenges for developing web-based systems. The ability to analyze quality early in the development life cycle is crucial. Among the te...