28 search results - page 5 / 6 » The PARSEC benchmark suite: characterization and architectur... |
HPCA
2004
IEEE
14 years 6 months ago
2004
IEEE
As microprocessors become increasingly complex, the techniques used to analyze and predict their behavior must become increasingly rigorous. This paper applies wavelet analysis te...
VLSID
2001
IEEE
14 years 6 months ago
2001
IEEE
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...
KDD
2005
ACM
14 years 6 months ago
2005
ACM
Computer architects utilize simulation tools to evaluate the merits of a new design feature. The time needed to adequately evaluate the tradeoffs associated with adding any new fe...
DAC
1999
ACM
14 years 7 months ago
1999
ACM
We empirically assess the implications of fixed terminals for hypergraph partitioning heuristics. Our experimental testbed incorporates a leading-edge multilevel hypergraph partit...
VLSID
2008
IEEE
14 years 6 months ago
2008
IEEE
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the ...