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DT
2006
109views more  DT 2006»
13 years 5 months ago
Test Consideration for Nanometer-Scale CMOS Circuits
The ITRS (International Technology Roadmap for Semiconductors) predicts aggressive scaling down of device size, transistor threshold voltage and oxide thickness to meet growing de...
Kaushik Roy, T. M. Mak, Kwang-Ting (Tim) Cheng
NECO
2011
13 years 8 days ago
Collective Stability of Networks of Winner-Take-All Circuits
The neocortex has a remarkably uniform neuronal organization, suggesting that common principles of processing are employed throughout its extent. In particular, the patterns of co...
Ueli Rutishauser, Rodney J. Douglas, Jean-Jacques ...
DAC
2005
ACM
13 years 7 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
DATE
2008
IEEE
104views Hardware» more  DATE 2008»
13 years 12 months ago
Multi-Vector Tests: A Path to Perfect Error-Rate Testing
The importance of testing approaches that exploit error tolerance to improve yield has previously been established. Error rate, defined as the percentage of vectors for which the...
Shideh Shahidi, Sandeep Gupta
ECCV
2006
Springer
14 years 7 months ago
Enhancing the Point Feature Tracker by Adaptive Modelling of the Feature Support
We consider the problem of tracking a given set of point features over large sequences of image frames. A classic procedure for monitoring the tracking quality consists in requirin...
Anthony Remazeilles, François Chaumette, Si...