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» The Price of Routing in FPGAs
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ISPD
2009
ACM
79views Hardware» more  ISPD 2009»
14 years 17 days ago
A routing approach to reduce glitches in low power FPGAs
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
Quang Dinh, Deming Chen, Martin D. F. Wong
FPGA
2006
ACM
125views FPGA» more  FPGA 2006»
13 years 9 months ago
Armada: timing-driven pipeline-aware routing for FPGAs
While previous research has shown that FPGAs can efficiently implement many types of computations, their flexibility inherently limits their clock rate. Several research groups ha...
Kenneth Eguro, Scott Hauck
FPGA
1995
ACM
149views FPGA» more  FPGA 1995»
13 years 9 months ago
PathFinder: A Negotiation-based Performance-driven Router for FPGAs
Routing FPGAs is a challenging problem because of the relative scarcity of routing resources, both wires and connection points. This can lead either to slow implementations caused...
Larry McMurchie, Carl Ebeling
FPGA
2005
ACM
137views FPGA» more  FPGA 2005»
13 years 11 months ago
HARP: hard-wired routing pattern FPGAs
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia...
STOC
2001
ACM
103views Algorithms» more  STOC 2001»
14 years 6 months ago
The price of selfish routing
Marios Mavronicolas, Paul G. Spirakis