Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...
Yiyu Shi, Tong Jing, Lei He, Zhe Feng 0002, Xianlo...
Steiner tree is a fundamental problem in the automatic interconnect optimization for VLSI design. We present a probabilistic analysis method for constructing rectilinear Steiner t...
We present a polynomial-time approximation scheme (PTAS) for the Steiner tree problem with polygonal obstacles in the plane with running time O(n log2 n), where n denotes the numb...
The natural relaxation for the Group Steiner Tree problem, as well as for its generalization, the Directed Steiner Tree problem, is a flow-based linear programming relaxation. We...
Eran Halperin, Guy Kortsarz, Robert Krauthgamer, A...
We provide a new theoretical framework for constructing Steiner routing trees with minimum Elmore delay. Earlier work [3, 13] has established Elmore delay as a high delity estima...
Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCo...