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» The YAGS Branch Prediction Scheme
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ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
13 years 9 months ago
The Block-Based Trace Cache
The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
Bryan Black, Bohuslav Rychlik, John Paul Shen
IPCCC
1999
IEEE
13 years 9 months ago
Accurately modeling speculative instruction fetching in trace-driven simulation
Performance evaluation of modern, highly speculative, out-of-order microprocessors and the corresponding production of detailed, valid, accurate results have become serious challe...
R. Bhargava, L. K. John, F. Matus
ISCA
1995
IEEE
133views Hardware» more  ISCA 1995»
13 years 8 months ago
Performance Evaluation of the PowerPC 620 Microarchitecture
The PowerPC 620TM microprocessor1 is the most recent and performance leading member of the PowerPCTM family. The 64-bit PowerPC 620 microprocessor employs a two-phase branch predi...
Trung A. Diep, Christopher Nelson, John Paul Shen
BMCBI
2007
117views more  BMCBI 2007»
13 years 5 months ago
Supervised multivariate analysis of sequence groups to identify specificity determining residues
Background: Proteins that evolve from a common ancestor can change functionality over time, and it is important to be able identify residues that cause this change. In this paper ...
Iain M. Wallace, Desmond G. Higgins