Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Intelligence analysts face the need for immediate, up-to-date information about individuals of interest. While biographies can be written and stored in text databases, we argue tha...
In this paper we present a "high-level" FPGA architecture description language which lets FPGA architects succinctly and quickly describe an FPGA routing architecture. W...
Software architecture description languages (ADLs) were a particularly active research area in the 1990s. In 2000, we published an extensive study of existing ADLs, which has serv...
Abstract— Owing to the recent trend of using applicationspecific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specif...