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    » The microarchitecture of FPGA-based soft processors
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    IEEEPACT
    2007
    IEEE
    83views Distributed And Parallel Com...» more  IEEEPACT 2007»
    Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking
    13 years 12 months ago
    Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking
    Download  iacoma.cs.uiuc.edu
    Under current worst-case design practices, manufacturers specify conservative values for processor frequencies in order to guarantee correctness. To recover some of the lost perfo...
    Brian Greskamp, Josep Torrellas
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    DATE
    2007
    IEEE
    106views Hardware» more  DATE 2007»
    Low-cost protection for SER upsets and silicon defects
    13 years 12 months ago
    Low-cost protection for SER upsets and silicon defects
    Download  www.eecs.umich.edu
    Extreme transistor scaling trends in silicon technology are soon to reach a point where manufactured systems will suffer from limited device reliability and severely reduced life...
    Mojtaba Mehrara, Mona Attariyan, Smitha Shyam, Kyp...
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