3 search results - page 1 / 1 » Thermally robust clocking schemes for 3D integrated circuits |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
3D integration of multiple active layers into a single chip is a viable technique that greatly reduces the length of global wires by providing vertical connections between layers....
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
3-D IC has a great potential for improving circuit performance and degree of integration. It is also an attractive platform for system-on-chip or system-in-package solutions. A cr...