3 search results - page 1 / 1 » Timing Arc based logic analysis for false noise reduction |
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
The problem of calculating accurate impact of crosstalk on a circuit considering its inherent logic and timing properties is very complex. Although it has been widely studied, it ...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been pr...
TODAES
2002
13 years 4 months ago
2002
ct Cross-coupled noise analysis has become a critical concern in today's VLSI designs. Typically, noise analysis makes an assumption that all aggressing nets can simultaneousl...