28 search results - page 6 / 6 » Timing Driven Placement for Quasi Delay-Insensitive Circuits |
ISPD
2005
ACM
13 years 10 months ago
2005
ACM
In this paper, the problem of bus-driven floorplanning is addressed. Given a set of blocks and the bus specification (the width of each bus and the blocks that the bus need to g...
ISPD
2005
ACM
13 years 10 months ago
2005
ACM
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...