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» Timing Verification by Successive Approximation
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ICASSP
2011
IEEE
12 years 9 months ago
Compressive sampling with a successive approximation ADC architecture
This paper proposes a compressive sampling scheme based on random temporal sampling using a successive approximation register (SAR) ADC architecture. Variable wordlength data samp...
Chenchi Luo, James H. McClellan
ALMOB
2008
92views more  ALMOB 2008»
13 years 5 months ago
Reconstructing phylogenies from noisy quartets in polynomial time with a high success probability
Background: In recent years, quartet-based phylogeny reconstruction methods have received considerable attentions in the computational biology community. Traditionally, the accura...
Gang Wu, Ming-Yang Kao, Guohui Lin, Jia-Huai You
COMPGEOM
2004
ACM
13 years 9 months ago
Continuous path verification in multi-axis NC-machining
We introduce a new approach to the problem of collision detection between a rotating milling-cutter of an NC-machine and a model of a solid workpiece, as the rotating cutter conti...
Ron Wein, Oleg Ilushin, Gershon Elber, Dan Halperi...
GLVLSI
2008
IEEE
147views VLSI» more  GLVLSI 2008»
14 years 6 days ago
Statistical timing analysis of flip-flops considering codependent setup and hold times
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Safar Hatami, Hamed Abrishami, Massoud Pedram
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
14 years 6 months ago
Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study
Choosing the right methodology is a significant step towards successful VLSI designs. Traditional methodologies and tools are no longer adequate to handle large and complex design...
Sanjeev Patel