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VLSID
2002
IEEE
94views VLSI» more  VLSID 2002»
14 years 4 months ago
Timing Yield Calculation Using an Impulse-Train Approach
This paper presents a new method to compute the probability distribution of the delay of a combinational circuit and uses it obtain an estimate of the yield of the process that ma...
Srinath R. Naidu
DATE
1997
IEEE
70views Hardware» more  DATE 1997»
13 years 8 months ago
Fast power loss calculation for digital static CMOS circuits
: In this paper, we present a new dynamic power estimation method that produces accurate power measures at considerably faster run times. The approach uses an enhanced switch-level...
Sergey Gavrilov, Alexey Glebov, S. Rusakov, David ...
ICCAD
2010
IEEE
108views Hardware» more  ICCAD 2010»
13 years 1 months ago
Mathematical yield estimation for two-dimensional-redundancy memory arrays
Defect repair has become a necessary process to enhance the overall yield for memories since manufacturing a natural good memory is difficult in current memory technologies. This ...
Mango Chia-Tso Chao, Ching-Yu Chin, Chen-Wei Lin
PVLDB
2011
12 years 7 months ago
An Incremental Hausdorff Distance Calculation Algorithm
The Hausdorff distance is commonly used as a similarity measure between two point sets. Using this measure, a set X is considered similar to Y iff every point in X is close to at ...
Sarana Nutanong, Edwin H. Jacox, Hanan Samet
TCAD
2008
98views more  TCAD 2008»
13 years 4 months ago
Early Analysis and Budgeting of Margins and Corners Using Two-Sided Analytical Yield Models
Manufacturing process variations lead to variability in circuit delay and, if not accounted for, can cause excessive timing yield loss. The familiar traditional approaches to timin...
Khaled R. Heloue, Farid N. Najm