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ASPDAC
2009
ACM

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Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography

13 years 11 months ago

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Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...

Kwangok Jeong, Andrew B. Kahng

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ICCAD
2009
IEEE

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Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography

13 years 3 months ago

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Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...

Mohit Gupta, Kwangok Jeong, Andrew B. Kahng

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