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ENTCS
2008
71views more  ENTCS 2008»
13 years 5 months ago
An Inverse Method for Parametric Timed Automata
Given a timed automaton with parametric timings, our objective is to describe a procedure for deriving constraints on the parametric timings in order to ensure that, for each valu...
Étienne André, Thomas Chatain, Laure...
FSEN
2009
Springer
14 years 10 days ago
Modular Schedulability Analysis of Concurrent Objects in Creol
We present an automata theoretic framework for modular schedulability analysis of real time asynchronous objects modeled in the language Creol. In previous work we analyzed the sch...
Frank S. de Boer, Tom Chothia, Mohammad Mahdi Jagh...
VLSID
1999
IEEE
91views VLSI» more  VLSID 1999»
13 years 10 months ago
Timed Circuit Synthesis Using Implicit Methods
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...
Robert Thacker, Wendy Belluomini, Chris J. Myers
ACSD
2007
IEEE
67views Hardware» more  ACSD 2007»
14 years 1 days ago
Hazard Checking of Timed Asynchronous Circuits Revisited
This paper proposes a new approach for the hazard checking of timed asynchronous circuits. Previous papers proposed either exact algorithms, which suffer from statespace explosion...
Frédéric Béal, Tomohiro Yoned...
IJCNN
2000
IEEE
13 years 10 months ago
Hardware Implementation of a PCA Learning Network by an Asynchronous PDM Digital Circuit
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
Yuzo Hirai, Kuninori Nishizawa