16 search results - page 1 / 4 » Timing driven placement in interaction with netlist transfor... |
ISPD
1997
ACM
13 years 9 months ago
1997
ACM
In this paper, we present a new approach that performs timing driven placement for standard cell circuits in interaction with netlist transformations. As netlist transformations a...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
VLSID
2002
IEEE
13 years 9 months ago
2002
IEEE
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...
ISPD
2007
ACM
13 years 6 months ago
2007
ACM
Traditionally, research in global placement has focused on relatively few simple metrics, such as pure wirelength or routability estimates. However, in the real world today, desig...
ISPD
1997
ACM
13 years 9 months ago
1997
ACM
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...