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» Timing-driven global routing with efficient buffer insertion
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ASPDAC
2007
ACM
86views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Fast Buffered Delay Estimation Considering Process Variations
- Advanced process technologies impose more significant challenges especially when manufactured circuits exhibit substantial process variations. Consideration of process variations...
Tien-Ting Fang, Ting-Chi Wang
ICCAD
2000
IEEE
102views Hardware» more  ICCAD 2000»
13 years 10 months ago
Provably Good Global Buffering Using an Available Buffer Block Plan
To implement high-performance global interconnect without impacting the performance of existing blocks, the use of buffer blocks is increasingly popular in structured-custom and b...
Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu,...
VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
14 years 6 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
DAC
2006
ACM
14 years 6 months ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...
ASPDAC
2010
ACM
143views Hardware» more  ASPDAC 2010»
13 years 3 months ago
Constrained global scheduling of streaming applications on MPSoCs
Abstract-- We present a global scheduling framework for synchronous data flow (SDF) streaming applications on MPSoCs, based on optimized computation and contention-free routing. Th...
Jun Zhu, Ingo Sander, Axel Jantsch