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» Tolerating node failures in cache only memory architectures
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SC
1994
ACM
13 years 8 months ago
Tolerating node failures in cache only memory architectures
Alain Gefflaut, Christine Morin, Michel Banâ...
ICPP
1995
IEEE
13 years 8 months ago
The Application of Skewed-Associative Memories to Cache Only Memory Architectures
— Skewed-associative caches use several hash functions to reduce collisions in caches without increasing the associativity. This technique can increase the hit ratio of a cache w...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
ICCD
2006
IEEE
124views Hardware» more  ICCD 2006»
14 years 1 months ago
Customizable Fault Tolerant Caches for Embedded Processors
Abstract— The continuing divergence of processor and memory speeds has led to the increasing reliance on larger caches which have become major consumers of area and power in embe...
Subramanian Ramaswamy, Sudhakar Yalamanchili
DAC
2011
ACM
12 years 4 months ago
DRAIN: distributed recovery architecture for inaccessible nodes in multi-core chips
As transistor dimensions continue to scale deep into the nanometer regime, silicon reliability is becoming a chief concern. At the same time, transistor counts are scaling up, ena...
Andrew DeOrio, Konstantinos Aisopos, Valeria Berta...
HICSS
1994
IEEE
152views Biometrics» more  HICSS 1994»
13 years 9 months ago
Simple COMA Node Implementations
Shared memory architectures often have caches to reduce the number of slow remote memory accesses. The largest possible caches exist in shared memory architectures called Cache-On...
Erik Hagersten, Ashley Saulsbury, Anders Landin