8 search results - page 2 / 2 » Topological Placement with Multiple Symmetry Groups of Devic... |
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
1In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering du...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
-- In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interfere...
DAC
2009
ACM
14 years 6 months ago
2009
ACM
With the thermal effect, improper analog placements may degrade circuit performance because the thermal impact from power devices can affect electrical characteristics of the ther...