17 search results - page 2 / 4 » Trace Reduction for Virtual Memory Simulations |
HPDC
2006
IEEE
13 years 11 months ago
2006
IEEE
Trace-driven simulation is an important technique used in the evaluation of computer architecture innovations. However using it for studying parallel computers and applications is...
EUROSYS
2007
ACM
14 years 2 months ago
2007
ACM
Virtual memory has been successfully used in different domains to extend the amount of memory available to applications. We have adapted this mechanism to sensor networks, where,...
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
ISPASS
2009
IEEE
14 years 9 days ago
2009
IEEE
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...