14 search results - page 2 / 3 » Tradeoff between data-, instruction-, and thread-level paral... |
ISPASS
2009
IEEE
14 years 4 days ago
2009
IEEE
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation...
LCTRTS
2005
Springer
13 years 10 months ago
2005
Springer
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
SPDP
1991
IEEE
13 years 8 months ago
1991
IEEE
A number of experiments regarding the placement of instructions, private data and shared data in the Non-Uniform-Memory-Access multiprocessor, RP3 has been performed. Three Scient...
ISCA
1994
IEEE
13 years 9 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...