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    ISPD
    2003
    ACM
    133views Hardware» more  ISPD 2003»
    Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
    13 years 10 months ago
    Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
    Download  vlsi.ece.wisc.edu
    In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
    Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Pin...
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    CGA
    1999
    150views Computational Geometry» more  CGA 1999»
    Visualizing Large Telecommunication Data Sets
    13 years 5 months ago
    Visualizing Large Telecommunication Data Sets
    Download  infovis.uni-konstanz.de
    displays to abstract network data and let users interactwithit.Wehaveimplementedafull-scaleSwift3D prototype, which generated the examples we present here. Swift-3D We developed Sw...
    Eleftherios Koutsofios, Stephen C. North, Daniel A...
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