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MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 5 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
PLDI
2010
ACM
13 years 8 months ago
Parameterized Verification of Transactional Memories
We describe an automatic verification method to check whether transactional memories ensure strict serializability--a key property assumed of the transactional interface. Our main...
Michael Emmi, Rupak Majumdar, Roman Manevich
COMPSAC
2002
IEEE
13 years 10 months ago
New Model and Scheduling Protocol for Transactional Workflows
A transactional workflow is composed of traditional flat transactions, and its execution has relaxed transactional atomicity. Due to different termination characteristics of trans...
Ke Ding, Beihong Jin, Jun Wei, Yulin Feng
FAC
2008
80views more  FAC 2008»
13 years 5 months ago
Verification of Mondex electronic purses with KIV: from transactions to a security protocol
The Mondex case study about the specification and refinement of an electronic purse as defined in the Oxford Technical Monograph PRG-126 has recently been proposed as a challenge f...
Dominik Haneberg, Gerhard Schellhorn, Holger Grand...
RV
2010
Springer
171views Hardware» more  RV 2010»
13 years 3 months ago
Runtime Verification for Software Transactional Memories
Software transactional memories (STMs) promise simple and efficient concurrent programming. Several correctness properties have been proposed for STMs. Based on a bounded conflict ...
Vasu Singh