1640 search results - page 2 / 328 » Transistor-Level Timing Analysis Using Embedded Simulation |
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
DAC
2002
ACM
14 years 5 months ago
2002
ACM
In this paper, a new timing generation method is proposed for the performance analysis of embedded software. The time stamp generation of I/O accesses is crucial to performance es...
AICCSA
2008
IEEE
13 years 6 months ago
2008
IEEE
Nanodevices based circuit design will be based on the acceptance that a high percentage of devices in the design will be defective. In this work, we investigate a defect tolerant ...
TACAS
1998
Springer
13 years 9 months ago
1998
Springer
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
CHES
2009
Springer
14 years 5 months ago
2009
Springer
? This paper gives an overview of the place of reverse engineering (RE) in the semiconductor industry, and the techniques used to obtain information from semiconductor products. Th...