12 search results - page 3 / 3 » Transparent dynamic binding with fault-tolerant cache cohere... |
ISCA
2010
IEEE
13 years 7 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...