9 search results - page 1 / 2 » Trends of On-Chip Interconnects in Deep Sub-Micron VLSI |
IEICET
2006
13 years 4 months ago
2006
DAC
1999
ACM
14 years 5 months ago
1999
ACM
DAC
2006
ACM
13 years 10 months ago
2006
ACM
VLSI engineers have traditionally used a variety of CAD analysis tools (e.g. SPICE) to deal with variability. As we go into deep sub micron issues, the analysis is becoming harder...
TC
2008
13 years 4 months ago
2008
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...