55 search results - page 2 / 11 » Tuning of Loop Cache Architectures to Programs in Embedded S... |
ISLPED
2005
ACM
13 years 10 months ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
ISVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
Previous work has shown that cache line sizes impact performance differently for different desktop programs – some programs work better with small line sizes, others with larger...
CASES
2000
ACM
13 years 9 months ago
2000
ACM
We describe an automated environment to assist a system-on-achip designer to tune a microprocessor core to a particular application program that will run on the microprocessor, an...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
The excessive complexity of both machine architectures and applications have made it difficult for compilers to statically model and predict application behavior. This observatio...