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» Two VLSI Design Advances in Arithmetic Coding
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ISCAS
1995
IEEE
66views Hardware» more  ISCAS 1995»
13 years 8 months ago
Two VLSI Design Advances in Arithmetic Coding
Bin Fu, Keshab K. Parhi
DCC
1993
IEEE
13 years 8 months ago
Minimizing Error and VLSI Complexity in the Multiplication-Free Approximation of Arithmetic Coding
Two new algorithms for performing arithmetic coding without employing multiplication are presented. The first algorithm, suitable for an alphabet of arbitrary size, reduces the wo...
Gennady Feygin, P. Glenn Gulak, Paul Chow
CODES
2003
IEEE
13 years 10 months ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa
FCCM
2004
IEEE
121views VLSI» more  FCCM 2004»
13 years 8 months ago
Validation of an Advanced Encryption Standard (AES) IP Core
This paper describes the package of test bench code required to verify the Algotronix' AES IP Core. Several authors (see the references in [3]) have published papers detailing...
Valeri F. Tomashau, Tom Kean