9 search results - page 1 / 2 » Two dimensional highly associative level-two cache design |
ICCD
2008
IEEE
14 years 1 months ago
2008
IEEE
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...
DAC
2012
ACM
11 years 7 months ago
2012
ACM
Spin-Transfer Torque RAM (STT-RAM) is an emerging non-volatile memory (NVM) technology that has the potential to replace the conventional on-chip SRAM caches for designing a more ...
SIGMETRICS
1991
ACM
13 years 8 months ago
1991
ACM
Prior to this work, all implementations of stack simulation [MGS70] required more than linear time to process an address trace. In particular these implementations are often slow ...
TC
2008
13 years 4 months ago
2008
Recent studies have shown that, in highly associative caches, the performance gap between the Least Recently Used (LRU) and the theoretical optimal replacement algorithms is large,...
SPDP
1993
IEEE
13 years 8 months ago
1993
IEEE
Meerkat is a distributed memory multicomputer architecture that scales to hundreds of processors. Meerkat uses a two dimensional passive backplane to connect nodes composed of pro...