130 search results - page 26 / 26 » TxLinux: using and managing hardware transactional memory in... |
IWOMP
2007
Springer
13 years 11 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
IEEEPACT
2005
IEEE
13 years 11 months ago
2005
IEEE
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
ACMMSP
2005
ACM
13 years 11 months ago
2005
ACM
64-bit address spaces are increasingly important for modern applications, but they come at a price: pointers use twice as much memory, reducing the effective cache capacity and m...
EGH
2004
Springer
13 years 10 months ago
2004
Springer
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
IWMM
2009
Springer
13 years 12 months ago
2009
Springer
: © Garbage Collection in the Next C++ Standard Hans-J. Boehm, Mike Spertus HP Laboratories HPL-2009-360 C++, garbage collection C++ has traditionally relied on manual memory mana...