44 search results - page 4 / 9 » Understanding the Behavior of Simultaneous Multithreaded and... |
CAV
2012
Springer
11 years 7 months ago
2012
Springer
The growing complexity of hardware optimizations employed by multiprocessors leads to subtle distinctions among allowed and disallowed behaviors, posing challenges in specifying th...
SPAA
1990
ACM
13 years 9 months ago
1990
ACM
Multithreading has been proposed as an architectural strategy for tolerating latency in multiprocessors and, through limited empirical studies, shown to offer promise. This paper ...
ISPASS
2006
IEEE
13 years 11 months ago
2006
IEEE
Commercial processors have support for Simultaneous Multithreading (SMT), yet little work has been done to provide representative simulation results for SMT. Given a workload, cur...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper explores thread scheduling on an increasingly popular architecture: chip multiprocessors with simultaneous multithreading cores. Conventional multiprocessor scheduling,...
HPCA
2006
IEEE
14 years 5 months ago
2006
IEEE
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...