42 search results - page 8 / 9 » Understanding the effects of wrong-path memory references on... |
ICPP
2006
IEEE
13 years 11 months ago
2006
IEEE
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...
ISCA
1994
IEEE
13 years 9 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
ASPLOS
2011
ACM
12 years 9 months ago
2011
ACM
The power-efficient massively parallel Graphics Processing Units (GPUs) have become increasingly influential for scientific computing over the past few years. However, their ef...
IWMM
2007
Springer
13 years 11 months ago
2007
Springer
This paper presents an analysis and transformation for individual object reclamation in Java programs. First, we propose a uniqueness inference algorithm that identifies variable...
RTSS
2006
IEEE
13 years 11 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...