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» Understanding the interconnection network of SpiNNaker
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TJS
2002
118views more  TJS 2002»
13 years 5 months ago
The MAGNeT Toolkit: Design, Implementation and Evaluation
Abstract-The current trend in constructing high-performance computing systems is to connect a large number of machines via a fast interconnect or a large-scale network such as the ...
Wu-chun Feng, Mark K. Gardner, Jeffrey R. Hay

Publication
273views
12 years 3 months ago
 Beyond Graphs: A New Synthesis.
Artificial neural networks, electronic circuits, and gene networks are some examples of systems that can be modeled as networks, that is, as collections of interconnected nodes. I...
Mattiussi, Claudio, Dürr, Peter, Marbach, Daniel ...
HPCA
2009
IEEE
14 years 6 months ago
Express Cube Topologies for on-Chip Interconnects
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
NOCS
2007
IEEE
13 years 11 months ago
On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus
Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The ...
Thomas William Ainsworth, Timothy Mark Pinkston
ICCCN
2008
IEEE
13 years 12 months ago
Instrumentation and Analysis of MPI Queue Times on the SeaStar High-Performance Network
—Understanding the communication behavior and network resource usage of parallel applications is critical to achieving high performance and scalability on systems with tens of th...
Ron Brightwell, Kevin T. Pedretti, Kurt B. Ferreir...