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MICRO
1999
IEEE
108views Hardware» more  MICRO 1999»
13 years 10 months ago
Exploiting ILP in Page-based Intelligent Memory
This study compares the speed, area, and power of di erent implementations of Active Pages OCS98], an intelligent memory system which helps bridge the growing gap between processo...
Mark Oskin, Justin Hensley, Diana Keen, Frederic T...
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 5 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
DAC
2005
ACM
14 years 6 months ago
MP core: algorithm and design techniques for efficient channel estimation in wireless applications
Channel estimation and multiuser detection are enabling technologies for future generations of wireless applications. However, sophisticated algorithms are required for accurate c...
Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timoth...
CPE
2000
Springer
292views Hardware» more  CPE 2000»
13 years 10 months ago
SREPT: Software Reliability Estimation and Prediction Tool
Abstract. Several tools have been developed for the estimation of software reliability. However, they are highly specialized in the approaches they implement and the particular pha...
Srinivasan Ramani, Kishor S. Trivedi
HPCA
2006
IEEE
14 years 6 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...