18 search results - page 4 / 4 » Using Symbolic Algebra in Algorithmic Level DSP Synthesis |
DSD
2010
IEEE
13 years 3 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
ICCAD
1995
IEEE
13 years 8 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
STTT
2008
13 years 5 months ago
2008
1 This papers introduces a generic framework for OBDD variants with weighted edges. It covers many boolean and multi-valued OBDD-variants that have been studied in the literature a...