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» Using Symbolic Simulation for Bounded Property Checking
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FDL
2003
IEEE
13 years 10 months ago
Using Symbolic Simulation for Bounded Property Checking
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Jürgen Ruf, Prakash Mohan Peranandam, Thomas ...
DAC
2004
ACM
14 years 5 months ago
A SAT-based algorithm for reparameterization in symbolic simulation
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
IFM
2010
Springer
147views Formal Methods» more  IFM 2010»
13 years 2 months ago
Symbolic Model-Checking of Optimistic Replication Algorithms
Abstract. The Operational Transformation (OT) approach, used in many collaborative editors, allows a group of users to concurrently update replicas of a shared object and exchange ...
Hanifa Boucheneb, Abdessamad Imine, Manal Najem
ENTCS
2006
112views more  ENTCS 2006»
13 years 4 months ago
Distributed Symbolic Bounded Property Checking
In this paper we describe an algorithm for distributed, BDD-based bounded property checking and its implementation in the verification tool SymC. The distributed algorithm verifie...
Pradeep Kumar Nalla, Roland J. Weiss, Prakash Moha...
FMCAD
2007
Springer
13 years 8 months ago
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...