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IEEEPACT
2008
IEEE
13 years 11 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...
ICPP
2008
IEEE
13 years 11 months ago
VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...
Heiner Litz, Holger Fröning, Mondrian Nü...
VLDB
2005
ACM
180views Database» more  VLDB 2005»
13 years 10 months ago
Cache-conscious Frequent Pattern Mining on a Modern Processor
In this paper, we examine the performance of frequent pattern mining algorithms on a modern processor. A detailed performance study reveals that even the best frequent pattern min...
Amol Ghoting, Gregory Buehrer, Srinivasan Parthasa...
HPCA
2004
IEEE
14 years 5 months ago
Accurate and Complexity-Effective Spatial Pattern Prediction
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas ...