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BMCBI
2008
111views more  BMCBI 2008»
13 years 4 months ago
MLIP: using multiple processors to compute the posterior probability of linkage
Background: Localization of complex traits by genetic linkage analysis may involve exploration of a vast multidimensional parameter space. The posterior probability of linkage (PP...
Manika Govil, Alberto Maria Segre, Veronica J. Vie...
FPL
2006
Springer
242views Hardware» more  FPL 2006»
13 years 8 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
WISA
2007
Springer
13 years 11 months ago
A Compact Architecture for Montgomery Elliptic Curve Scalar Multiplication Processor
We propose a compact architecture of a Montgomery elliptic curve scalar multiplier in a projective coordinate system over GF(2m ). To minimize the gate area of the architecture, we...
Yong Ki Lee, Ingrid Verbauwhede
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
13 years 10 months ago
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
Alexandre M. Amory, Marcelo Lubaszewski, Fernando ...
ISCA
1994
IEEE
104views Hardware» more  ISCA 1994»
13 years 9 months ago
Exploring the Design Space for a Shared-Cache Multiprocessor
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
Basem A. Nayfeh, Kunle Olukotun