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SIPS
2008
IEEE
14 years 6 days ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
MICRO
1991
IEEE
115views Hardware» more  MICRO 1991»
13 years 9 months ago
Executing Loops on a Fine-Grained MIMD Architecture
- We present techniques for exploiting parallelism extracted from loops on an MIMD system. Parallelism is exploited through parallel execution of instructions on multiple processor...
Sunah Lee, Rajiv Gupta
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
13 years 12 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
IWNAS
2008
IEEE
14 years 6 days ago
Parallel Job Scheduling with Overhead: A Benchmark Study
We study parallel job scheduling, where each job may be scheduled on any number of available processors in a given parallel system. We propose a mathematical model to estimate a j...
Richard A. Dutton, Weizhen Mao, Jie Chen, William ...