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» Using conjugate symmetries to enhance gate-level simulations
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DSN
2009
IEEE
13 years 11 months ago
Low overhead Soft Error Mitigation techniques for high-performance and aggressive systems
The threat of soft error induced system failure in high performance computing systems has become more prominent, as we adopt ultra-deep submicron process technologies. In this pap...
Naga Durga Prasad Avirneni, Viswanathan Subramania...
CHES
2006
Springer
146views Cryptology» more  CHES 2006»
13 years 8 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
QEST
2006
IEEE
13 years 10 months ago
UPPAAL 4.0
— UPPAAL 4.0 is the result of over two and a half years of development and contains many new features, additions to the modeling language, performance improvements, enhancements ...
Gerd Behrmann, Alexandre David, Kim Guldstrand Lar...
ICC
2007
IEEE
106views Communications» more  ICC 2007»
13 years 11 months ago
A Novel Feedback Mechanism for Load Balanced Two-Stage Switches
— A novel feedback mechanism is proposed in this paper to enhance the performance of load-balanced two-stage switches. The key idea is to properly select and coordinate the two s...
Kwan L. Yeung, Bing Hu, N. H. Liu
RPTEL
2006
96views more  RPTEL 2006»
13 years 4 months ago
Supporting Self-Directed Learners and Learning Communities with Sociotechnical Environments
Making learning part of life is an essential challenge for inventing the future of our societies. Lifelong learning is a necessity rather than a possibility or a luxury to be cons...
Gerhard Fischer, Masanori Sugimoto