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FPL
2005
Springer
136views Hardware» more  FPL 2005»
13 years 10 months ago
Architecture-Adaptive Routability-Driven Placement for FPGAs
Current FPGA placement algorithms estimate the routability of a placement using architecture-specific metrics. The shortcoming of using architecture-specific routability estimates ...
Akshay Sharma, Carl Ebeling, Scott Hauck
SADM
2010
173views more  SADM 2010»
13 years 22 hour ago
Data reduction in classification: A simulated annealing based projection method
This paper is concerned with classifying high dimensional data into one of two categories. In various settings, such as when dealing with fMRI and microarray data, the number of v...
Tian Siva Tian, Rand R. Wilcox, Gareth M. James
IPPS
1999
IEEE
13 years 9 months ago
Dynamically Scheduling the Trace Produced During Program Execution into VLIW Instructions
VLIW machines possibly provide the most direct way to exploit instruction level parallelism; however, they cannot be used to emulate current general-purpose instruction set archit...
Alberto Ferreira de Souza, Peter Rounce
ESWA
2010
105views more  ESWA 2010»
13 years 2 months ago
A numerical comparison between simulated annealing and evolutionary approaches to the cell formation problem
The Cell Formation Problem is a crucial component of a cell production design in a manufacturing system. This problem consists of a set of product parts to be manufactured in a gr...
Andres Pailla, Athila R. Trindade, Victor Parada, ...
DAC
2002
ACM
14 years 6 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton