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» VHDL extensions for complex transmission line simulation
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MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
13 years 11 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
INFOCOM
2009
IEEE
14 years 8 days ago
Power Controlled Scheduling with Consecutive Transmission Constraints: Complexity Analysis and Algorithm Design
Abstract—We study the joint power control and minimumframe-length scheduling problem in wireless networks, under the physical interference model and subject to consecutive transm...
Liqun Fu, Soung Chang Liew, Jianwei Huang
EJWCN
2010
162views more  EJWCN 2010»
13 years 15 days ago
OMNeT++-Based Cross-Layer Simulator for Content Transmission over Wireless Ad Hoc Networks
Flexbility and deployment simplicity are among the numerous advantages of wireless links when compared to standard wired communications. However, challenges do remain high for wire...
Raphaël Massin, Catherine Lamy-Bergot, Christ...
WSC
1997
13 years 7 months ago
Applications of Discrete Event Simulation in the Design of Automotive Powertrain Manufacturing Systems
Manufacturing automotive powertrain components (engines and transmissions) is a complex task involving the integration of hundreds of components. Simulation is commonly applied in...
Arun Jayaraman, Ali K. Gunal
EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
13 years 9 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng