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ISPD
1999
ACM
89views Hardware» more  ISPD 1999»
13 years 9 months ago
VIA design rule consideration in multi-layer maze routing algorithms
—Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this pap...
Jason Cong, Jie Fang, Kei-Yong Khoo
DAC
1997
ACM
13 years 9 months ago
More Practical Bounded-Skew Clock Routing
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
Andrew B. Kahng, Chung-Wen Albert Tsao