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» VLIW: a case study of parallelism verification
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FMOODS
2006
13 years 6 months ago
Modeling Long-Running Transactions with Communicating Hierarchical Timed Automata
Long-Running transactions consist of tasks which may be executed sequentially and in parallel, may contain sub-tasks, and may require to be completed before a deadline. These trans...
Ruggero Lanotte, Andrea Maggiolo-Schettini, Paolo ...
IWFM
1998
13 years 6 months ago
Formal Engineering of the Bitonic Sort using PVS
In this paper, we present a proof that the bitonic sort is sound using PVS, a powerful specification and verification environment. First, we briefly introduce this well-known para...
Raphaël Couturier
DATE
2004
IEEE
138views Hardware» more  DATE 2004»
13 years 8 months ago
Microarchitecture Development via Metropolis Successive Platform Refinement
Productivity data for IC designs indicates an exponential increase in design time and cost with the number of elements that are to be included in a device. Present applications re...
Douglas Densmore, Sanjay Rekhi, Alberto L. Sangiov...
POPL
2010
ACM
14 years 2 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
EXPCS
2007
13 years 8 months ago
EXACT: the experimental algorithmics computational toolkit
In this paper, we introduce EXACT, the EXperimental Algorithmics Computational Toolkit. EXACT is a software framework for describing, controlling, and analyzing computer experimen...
William E. Hart, Jonathan W. Berry, Robert T. Heap...