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DFT
2009
IEEE
178views VLSI» more  DFT 2009»
13 years 11 months ago
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
Bradley F. Dutton, Charles E. Stroud
DFT
1999
IEEE
125views VLSI» more  DFT 1999»
13 years 9 months ago
Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
John Lach, William H. Mangione-Smith, Miodrag Potk...
RECONFIG
2009
IEEE
118views VLSI» more  RECONFIG 2009»
13 years 11 months ago
Protecting the NOEKEON Cipher against SCARE Attacks in FPGAs by Using Dynamic Implementations
Abstract. Protecting an implementation against Side Channel Analysis for Reverse Engineering (SCARE) attacks is a great challenge and we address this challenge by presenting a fir...
Julien Bringer, Hervé Chabanne, Jean-Luc Da...
SBCCI
2006
ACM
171views VLSI» more  SBCCI 2006»
13 years 11 months ago
Asynchronous circuit design on reconfigurable devices
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
FCCM
2002
IEEE
126views VLSI» more  FCCM 2002»
13 years 10 months ago
Hyperspectral Image Compression on Reconfigurable Platforms
NASA’s satellites currently do not make use of advanced image compression techniques during data transmission to earth because of limitations in the available platforms. With th...
Thomas W. Fry, Scott Hauck