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» VPN Gateways over Network Processors: Implementation and Eva...
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EUROPAR
2010
Springer
13 years 5 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
DSN
2007
IEEE
13 years 11 months ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...