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DSN
2007
IEEE
14 years 3 days ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
SIGARCH
2008
94views more  SIGARCH 2008»
13 years 5 months ago
Parallelization, performance analysis, and algorithm consideration of Hough transform on chip multiprocessors
This paper presents a parallelization framework for emerging applications on the future chip multiprocessors (CMPs). With the continuing prevalence of CMP and the number of on-die...
Wenlong Li, Yen-Kuang Chen
CODES
2007
IEEE
14 years 3 days ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
RTSS
2006
IEEE
13 years 11 months ago
Run-Time Services for Hybrid CPU/FPGA Systems on Chip
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...
Jason Agron, Wesley Peck, Erik Anderson, David L. ...
VEE
2012
ACM
234views Virtualization» more  VEE 2012»
12 years 1 months ago
REEact: a customizable virtual execution manager for multicore platforms
With the shift to many-core chip multiprocessors (CMPs), a critical issue is how to effectively coordinate and manage the execution of applications and hardware resources to overc...
Wei Wang, Tanima Dey, Ryan W. Moore, Mahmut Aktaso...