2 search results - page 1 / 1 » Variation-tolerant non-uniform 3D cache management in die st... |
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...