3 search results - page 1 / 1 » Vector potential equivalent circuit based on PEEC inversion |
DAC
2003
ACM
14 years 6 months ago
2003
ACM
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
Most existing RCL−1 circuit reductions stamp inverse inductance L−1 elements by a second-order nodal analysis (NA). The NA formulation uses nodal voltage variables and describ...
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...