32 search results - page 4 / 7 » Verification Methodologies in a TLM-to-RTL Design Flow |
EVOW
1999
Springer
13 years 10 months ago
1999
Springer
This paper describes a new approximate approach for checking the correctness of the implementation of a protocol interface, comparing its lowlevel implementation with its high-leve...
DT
2006
13 years 5 months ago
2006
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
AHS
2007
IEEE
13 years 9 months ago
2007
IEEE
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
The negative effect of electromigration on signal and power line lifetime and functional reliability is an increasingly important problem for the physical design of integrated cir...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...